Abstract:
Digital Signal Processors (DSP) depending on the underlying architecture are- fixed-point and floating-point [1]. The fixed-point devices generally operate on 16-bit words, while the floating-point devices operate on 32-40 bits floating-point words. The fixed-point devices are generally cheaper. Architectural difference is that fixed-point processors tend to have an accumulator architecture, with only one "general purpose" register, making them quite tricky to program and more importantly, making C-compilers inherently inefficient. Floating-point DSPs behave more like common general-purpose CPUs, with register-files. Wireless communication is being revolutionized by new high performance signal processing systems [8]. Many system building blocks can now be built using digital technology, bringing new levels of manufacturability, reliability and performance – usually at reduced cost. Using technologies like the TMS320C6000 range from Texas Instruments, the Xilinx re-configurable devices, or the current state of the art in ADC and DAC converters allows designers to view their system in a whole new way. Market demands for higher cellular density in urban areas, broadband Internet wireless [7], and better data security, while using a minimum amount of frequency spectrum is driving wireless developments forward at an amazing speed. Forward leaps in computing power have resulted in GIGAFLOPS (billion floating point operations per seconds) or TERAMACS (million multiply-accumulate per second) of processing power that allows telecom engineers to do more and more processing in the digital domain. This offers obvious advantages in flexibility for the implementation of complex algorithms that permit a better utilization of the airwave spectrum, improved transmission quality, a better data security.
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